Digital hardware stores every number as a row of bits. What those bits mean depends on how you read them. Read as unsigned, an n-bit word holds 0 to 2n − 1. Read as 2's complement, the most significant bit has a negative weight of −2n−1, so the same word holds −2n−1 to 2n−1 − 1. With 8 bits, 1011 0110 is 182 unsigned and −74 signed.
Why hardware uses 2's complement
Addition and subtraction work the same way for signed and unsigned numbers, so one adder serves both. There is a single zero, and the sign is simply the top bit. That is why every processor and almost every DSP datapath uses it.
Negating a number
Invert every bit, then add 1. For 8-bit 45 (0010 1101): invert to 1101 0010, add 1 to get 1101 0011, which is −45. The most negative value, −128 in 8 bits, has no positive partner and negates to itself; this edge case causes real overflow bugs.
Changing width
Making a signed value wider copies the sign bit into the new bits (sign extension): 8-bit F3 (−13) becomes FFF3 in 16 bits. Unsigned values are zero-extended instead. Making a value narrower truncates the top bits, which changes the value if those bits were not all copies of the new sign bit.
Hex, octal and RTL literals
Each hex digit is exactly 4 bits, which is why hex is the normal way to write wide values. In Verilog a sized literal states its width and base, for example 8'hB6, 8'b1011_0110 or -8'sd74. The converter writes these for the current width, ready to paste into RTL or a testbench, and accepts them as input too.
Worked example
What is −45 in 8 bits? Type −45 in the signed field. Hex shows D3, binary 1101 0011, and the negate steps show the invert-and-add-one working. Switch to 16 bits and the same value becomes FFD3, a sign extension.
